Random access memory (RAM) is a computer's operational memory. The operational memory is where the components of the operating system that are needed to run the computer are loaded and stored. RAM also houses programs while they're being used. There have been many types of RAM but with the evolution of memory technology, the type widely used today is based on SDRAM (synchronous dynamic RAM) infrastructure. The latest DDR (double data rate) 1, 2 and 3 are all based on SDRAM architecture.
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This is the circuit board on which all the hardware components of RAM are soldered. It features a silicon-based semiconductor integrated circuitry providing connections between the memory components as well as interfacing with the computer to allow the processor and memory controller to access the RAM.
Unlike conventional (asynchronous) DRAM, SDRAM's memory operations are synchronized to a clock's signals, simplifying the control interface and eliminating the need for generating pseudo analog signals required in conventional DRAM. It also decreases manufacturing costs for the memory's components because faster memory could be made at the same cost.
This on-chip register's function is the configuration of the basic device operation. It controls the CAS (column address strobe) latency, burst length and burst type, and is usually set up while the computer is first powering up.
This is the section with the actual memory modules--cells--that store data. In SDRAM, there are always two or more banks, allowing one bank to be available for access while the other is being pre-charged. This eliminates the latency caused by precharging a single bank, which results in increased transfer rates. It also reduces the granularity of each bank, resulting in higher performances at lower costs for 16MB and higher memory densities.
SPD stands for serial presence detect. SDRAM features an on-board SPD chip that contains information about the memory type, size, speed and access time. This chip lets the computer access this information at start-up while it goes through its power-on test cycle.
The burst counter is an on-chip counter that keeps track of column addresses to enable high speed burst access. It uses two burst types--sequential and interleaved-- and different burst lengths, and these parameters can be programmed using the mode register.